Examples
One capability per example, each built and checked on a real DE10-Lite: a page that explains it, the full
Quartus project (.qar); one build makes the bitstream (.sof) to load. Each one is also a skill, so the AI can
rebuild it inside your own project.
PLL and clocks
Five clocks from one PLL, every clock on the board measured and shown.
verified 02ROM
Text and pictures in block memory, two ways; one rewritten over USB while running.
verified 03RAM, single and dual port
A self-testing RAM and a 160×120 frame buffer you paint on.
verified 04Game pad, wheel, buzzer
Every shield control through the ADC, debounced and reported; the template's ADC fixed.
verified (button map: press check to do) 05Read the screen
The picture back to the PC over USB; graphics tested against the simulation, pixel by pixel.
verified: 0 pixels differ 0664 MB SDRAM
A small controller and a test of all 33.5 million words.
verified 07Accelerometer
The ADXL345 over SPI: tilt, milli-g, a bubble level; 1.00 g at rest.
verified 08Switches, keys, 7-segment
Debounced inputs, a press counter, scrolling text on six digits.
verified (count mode: by hand)40-pin GPIO
The expansion header, with a loopback wire.
to do (needs the loopback)IP from the library
altsqrt, lpm_divide, dcfifo straight from Altera's library: a gravity meter.
verified 11FFT: IP vs our own
256 points both ways, scored against numpy: accuracy, speed and area.
verified 12DSP multipliers
The same engine in hardware multipliers and in logic: 0 vs 368 logic cells.
verified 13Keep a design after power-off
Write it into the MAX 10's own flash; it starts by itself.
flashed and verified (power cycle: by hand)How every example is made
examples/NN_name/src/the Verilog;sim/the unit tests;index.htmlthe page;<name>.qar(no prebuilt.sof: build it, a few minutes).- Shared, tested modules in
lib/rtl/(display chain, PLL, RAMs, ROMs, SPI, SDRAM, accelerometer, USB text link...); the board's pins inlib/board/de10_lite_pins.csv. - One command per step in
scripts/:new_project.py(project from the top module's ports),de10.py(build, program, flash, pack, log, screen, cam),sim.py(Icarus or ModelSim),make_stp.py(Signal Tap).